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Altera_Forum's avatar
Altera_Forum
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15 years ago

Slow PCIe cycles

I'm seeing very slow PCIe cycles from a PPC master to Altera FPGA Avalon MM slave peripherals. Typical times are 4us for a read and 7us for a write - which seem extremely pedestrian to me! Does...
Altera_Forum's avatar
Altera_Forum
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13 years ago

Only by getting the host to request more bytes in each PCIe request.

In my case the host is a small ppc running linux - and I was able to write a device driver for the dma engine embedded in the ppc's pcie block.

Not sure what you can do with an atom and windows 7.

You won't be able to affect the latency, but you can improve the throughput, reading into a wider register will probably still be a single PCIe request. You might be able to use of the the XMM3 (or whatever they are called) simd integer registers to read more bytes in one transfer.

(Do save/restore the register though.)