Sine wave generation using NCO megafunction on Max 10 FPGA development kit

Hi,

Thank you for the reply.

How can I use the hdl ? Please can you elaborate ?

For now, I have modified the .bdf and the pin planner assignments as per your suggestion. I have used a 16Mhz clock with 50 % duty cycle as the DAC_SCLK pin A7

Further, to set the data word, I have generated a 16Mhz 90% duty cycle clock and assigned it to pin DAC_SYNC (What exactly is the pin number of this..the user guide says U1.B10? I have gone ahead and put in PIN_B10 from the drop down menu in pin Planner since U1.B10 is not available as it is).

And lastly, I have assigned the out put of the parallel in serial out shift register to pin DAC_DIN pin A8.

I have then programmed the board with .sof file using the BTS application. I have then got the error attached.

"Failed to read production information from this SOF in the FPGA.Please select compatible FPGA design from Configure option in the menu bar.If you still met this issue, please try to restart the BTS GUI."

Also the verilog simulation gives me errors because the NCO megafunction is not licensed. I thought that I have access to test the megafunction for some limited time even without the license. So is there any way around this?

I would be much obliged if you could kindly help me sort out this error.

Regards,