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Altera_Forum's avatar
Altera_Forum
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12 years ago

Simulation of system with custom component

Hi, I am trying to debug my ip by simulating its behavior in full system via modelsim. My ip acts like a memory controller : receives read/write requests from processor and delivers them to on...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

Thanks for your answer , i solved problem by making my IP transparent to memory by setting property s0 bridgestomaster m0 in .tcl file.