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TSchu3's avatar
TSchu3
Icon for Occasional Contributor rankOccasional Contributor
5 years ago

Simulating Triple Speed Ethernet, Decryption Fails

Hello, I am trying to simulate the TSE testbench IP generated with Quartus Prime Standard 18.0. My simulator is Cadence Xcelium. Xcelium cannot decrypt the TSE testbench submodules.

I have not encountered this before with any of the other Quartus generated IP, but those may not have been encrypted (DDR2 controller for example).

Further investigation shows that all submodules for the TSE example testbench are broken out into ./Aldec or ./Mentor directories. This would explain why they cannot be decrypted by Cadence.

So is Cadence supported for the TSE testbench simulation? If so how do I generate the necessary files or how do I decrypt the files for Mentor or Aldec simulators.

Thanks!

19 Replies

  • Deshi_Intel's avatar
    Deshi_Intel
    Icon for Regular Contributor rankRegular Contributor

    Hi Travis,

    This is weird.

    I believe our only difference is you are using Quartus Win version while I am using Quartus Linux version.

    I don't want to rush into sharing with you linux cadence submodules files in case it create new issue .

    Let me validate this issue with Quartus Standard v19.1 Win first.

    Then I will get back to you.

    Thanks.

    Regards,

    dlim

    • TSchu3's avatar
      TSchu3
      Icon for Occasional Contributor rankOccasional Contributor

      Ok, thanks. I might be able to try the Linux version on another machine. I'll let you know if I can get that going.

      • TSchu3's avatar
        TSchu3
        Icon for Occasional Contributor rankOccasional Contributor

        Dlim, I succesfully generated the /cadence submodules folder and ran the simulation on a Linux machine. So there is definitly a bug in the Windows version of Quartus Standard.

        Thanks for your help figuring this out.

        Travis

  • Deshi_Intel's avatar
    Deshi_Intel
    Icon for Regular Contributor rankRegular Contributor

    Hi Travis,

    It's good to know you got it working in Linux.

    I need to find out more internally whether there is different sim tool support plan between Linux and Win or it's just purely a bug in Quartus Win

    Thanks.

    Regards,

    dlim

  • Deshi_Intel's avatar
    Deshi_Intel
    Icon for Regular Contributor rankRegular Contributor

    HI Travis,

    I carefully read back the EDA support plan table from Quartus release note doc and finally found out the answer is there all the while. Sorry, I didn't catch it earlier.

    Let me attached the screen shot and explain to you again.

    • For Cadence sim (IES) for both Quartus std and pro, there is bracket (64-bit Linux only) – I understand now this is referring to support in Linux OS only
    • If we look at Mentor Modelsim SE, it’s bracket (64-bit only) – this means it’s supported on both Win OS and Linux OS
    • If we look at Aldec Active-HDL, it's bracket (32 bits win only) - this means it's supported in Win OS only

    I hope I clarify your doubt now.

    Thanks.

    Regards,

    dlim

  • TSchu3's avatar
    TSchu3
    Icon for Occasional Contributor rankOccasional Contributor

    Dlim, thanks for looking into this further. I have to disagree with your assessment of Table 5 from the release notes. I believe it is referring to simulator support for launching the simulator from within Quartus. For example, going to tools/launch simulation library compiler. This makes sense since Cadence does not produce a Windows product.

    But I am not trying to open Cadence from Quartus and it does not address the issue of the missing submodule files.

    However when you look at the Triple-Speed Ethenet User guide v 19.4 page 171; both Cadence Xcelium and plain Cadence are listed as supported and it shows the files that should be produced. The Windows tool does produce those the files listed in table 111. However those files are useless without the submodule files that only the Linux version produces. So why would it produce some of the files but not all?

    To summarize I still believe this is a bug. Since the Ethernet user guide shows Cadence as supported but the Windows version does not produce all the necessary files for this IP.

  • Deshi_Intel's avatar
    Deshi_Intel
    Icon for Regular Contributor rankRegular Contributor

    Hi Travis,

    I have clarified with TSE engineering developer team.

    • It's not a bug as TSE IP has no plan to support Cadence in Win OS as mentioned in Quartus release note doc.
    • All Intel FPGA IP solution sim support plan needs to be align with Quartus support plan in general unless special clarified in respective IP user guide doc.

    What you mentioned in both TSE IP user guide doc and IP sim generation script indeed is a flaw that Intel needs to improve on.

    We are working internally to see how we can provide better clarification and user experience to customer moving forwards.

    For now, I hope that you can move on with your project development using Linux OS first.

    Thanks.

    Regards,

    dlim

    • TSchu3's avatar
      TSchu3
      Icon for Occasional Contributor rankOccasional Contributor

      Thanks for tracking that down. Hopefully the documentation can be made more clear soon for other users.

      I am able to proceed on my end.

      Thanks again,

      Travis

  • Deshi_Intel's avatar
    Deshi_Intel
    Icon for Regular Contributor rankRegular Contributor

    HI Travis,

    Yup, I will definitely work out the improvement plan with Intel team internally.

    Alright, I will be setting this case to closure shortly.

    Thanks.

    Regards,

    dlim