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TSchu3's avatar
TSchu3
Icon for Occasional Contributor rankOccasional Contributor
5 years ago

Simulating Triple Speed Ethernet, Decryption Fails

Hello, I am trying to simulate the TSE testbench IP generated with Quartus Prime Standard 18.0. My simulator is Cadence Xcelium. Xcelium cannot decrypt the TSE testbench submodules. I have not enco...
Deshi_Intel's avatar
Deshi_Intel
Icon for Regular Contributor rankRegular Contributor
5 years ago

Hi Travis,

I have clarified with TSE engineering developer team.

  • It's not a bug as TSE IP has no plan to support Cadence in Win OS as mentioned in Quartus release note doc.
  • All Intel FPGA IP solution sim support plan needs to be align with Quartus support plan in general unless special clarified in respective IP user guide doc.

What you mentioned in both TSE IP user guide doc and IP sim generation script indeed is a flaw that Intel needs to improve on.

We are working internally to see how we can provide better clarification and user experience to customer moving forwards.

For now, I hope that you can move on with your project development using Linux OS first.

Thanks.

Regards,

dlim

TSchu3's avatar
TSchu3
Icon for Occasional Contributor rankOccasional Contributor
5 years ago

Thanks for tracking that down. Hopefully the documentation can be made more clear soon for other users.

I am able to proceed on my end.

Thanks again,

Travis