Forum Discussion
Altera_Forum
Honored Contributor
16 years agoHi,
Did you try to increase the size of the FIFOs for the CVI and CVO? Have you set "FIFO level at which to start output" to a value that is close to the FIFO size in the CVOs? Did you manage to get the simpler system working? Block 1: [External 74.25MHz clock -> PG (720p 4:4:4 RGB) -> CVO] connects to Block 2: [External 74.25MHz clock -> CVI -> CVO]