SGDMA too slow with PCIe core

Hello,

I am seeting up the Altera contents for a frame grabber poject. I use a Cyclone IV GX 22 with a 4x PCIe interface. For this purpose the PCIe hard IP core is applied in the SOPC builder with a SGDMA module.

The input resolution can be varied from 480p60 to 1080p60 in 28-bit TTL format. After triple buffering a logic reads it back from the RAM and pushes into the PC through the SGDMA/PCIe cores.

The problem is that the SGDMA/PCIe combination is too slow. I am able to measure the ready signal of the SGDMA and found it is high for two clock cycles and low for 8. Clock frequency is 125MHz from the PCIe core. This performance is very far from our requirements. It should be at least 80% or more instead of 20%.

The burst transfer is enabled and length was a varied but nothing changed.

Does anybody has any experience with similar designs? I have no idea what to change.

Regards,

Istvan