I've never used it before but basically it keeps polling a descriptor until it's hardware owned bit gets set. So the linked list doesn't get traversed but instead it's meant for easily starting the SGDMA back up. So normally the SGDMA hits the end of the chain (owned by hardware = 0), but with this polling bit enabled all you have to do is flip the owned by hardware bit on the descriptor the SGDMA is waiting on instead of starting the engine back up again.
This feature is really meant for high latency links like PCIe. So instead of you having the CPU starting the SGDMA back up by accessing the CSR across the PCIe link you let the SGDMA start itself back up by having it continously polling the owned by hardware bit. This assumes that descriptors are located in the host memory. Also make sure you set the timeout counter register accordingly otherwise you might kill your link performance with the SGDMA constantly reading the owned by hardware bit.