SGDMA descriptor problem?

Might be worth looking at the HAL driver to figure out what it does. Unless it has changed the driver sets up the the descriptor structure and one of the last steps is it performs a flush by address to ensure that the structure is written out to memory. Also make sure that the descriptor in memory is aligned to the wide of the descriptor read/write masters. I think by default the descriptor masters are 256-bit so they expect to read/write a descriptor in a single transaction, I think you can configure them to be 32-bit but I'm not 100% sure you if 32-bit alignment of the descriptor in memory will work (use 256-bit to play it safe in that case).