Forum Discussion
1 Reply
- Altera_Forum
Honored Contributor
Hi,
the testbench will be included when you generate the SerialLite IP. Kent
Hi,
I am looking for simple testbench that is written totaly in VHDL for this IP. Does anybody has such testbench? Thanks in advance.Hi,
the testbench will be included when you generate the SerialLite IP. Kent