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Altera_Forum
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11 years ago

SERDES IP core for LVDS interfacing

Hello everyone, I need to do some video bypassing project on Cyclone V FPGA, which receives video from 28bits DVI and serialize them to 4bits LVDS interface, in order to display the video on LCD ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

hie gladys,

Maybe you wanna include a screenshot of your QII window?

I am using the QII Web Edition, v14.0, for CV as well.

i don't have this issue.

You should be able 2 pull out the ALTLVDS_TX IP 2 ways:

a. add a symbol > libraries > megafunctions > IO > ALTLVDS_TX

b. IP catalog > search for LVDS

i attached 2 screenshots, which hopefully is helpful to you.

thanx

https://www.alteraforum.com/forum/attachment.php?attachmentid=10741 https://www.alteraforum.com/forum/attachment.php?attachmentid=10742