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Altera_Forum
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10 years ago

SERDES IP core for LVDS interfacing

Hello everyone, I need to do some video bypassing project on Cyclone V FPGA, which receives video from 28bits DVI and serialize them to 4bits LVDS interface, in order to display the video on LCD ...
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Altera_Forum
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10 years ago

As Taz1984 suggested, go to the IP Catalog in Quartus 14.0, look under Library - Basic Functions - IO and see ALTLVDS_TX.