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Altera_Forum
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18 years ago

SDRAM Controller

Now, i am researching about SDRAM Controller Core.So o need some document its.Can you help me? Many thanks
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
18 years ago

Hello,

I don't understand what you mean with pinout in this respect. The operation of the old Altera SDRAM controller reference design is described rather detailed in the included white paper sdr_sdram.pdf. It can be easily operated for moderate speed requirements, e. g. 100 MHz at Cyclone or Cyclone II. As additonal remark, it may be necessary to define fast IO register for datapath and control signals explicitely in pin planner or assignment editor.

Regards,

Frank