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Gyud0's avatar
Gyud0
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

SDRAM Controller FPGA IP- read x"FFFF" from the IP and not the ejected data from SDRAM

Hey, I'm using the SDRAM Controller Intel FPGA IP for a 256Mbits device (16 bit). When I execute a read operation via the Avalon MM interface, I see that the SDRAM eject the correct data via it's...
AdzimZM_Altera's avatar
AdzimZM_Altera
Icon for Regular Contributor rankRegular Contributor
2 years ago

As we do not receive any response from you on the previous reply that we have provided, I now transition this thread to community support. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.