SDRAM Controller - Problems with reading

First off, I'd stick a scope on the signals to the SDRAM, and check they are doing something sane.

You should be able to see the clk running, and the various control signals moving around.

The DQ signals should be moving too. On DDR memory at least you can see which end is driving them because the FPGA tends to have a stronger drive strength than the memory. That will tell you if the read commands are getting to the memory.