Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

SDI Megacore refclk_rate

In the v11 SDI userguide it describes the new signal refclk_rate with the following: refclk_rate : Input : Set input 0 for a 148.35-MHz RX serial reference clock and input 1 for 148.35-MHz RX...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

i filed an SR on this:

Below statement is the corrected one.

Set input 0 for a 148.35-MHz RX serial reference clock and input 1 for 148.5-MHz RX serial reference clock.