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Honored Contributor
Honored ContributorSDI Megacore refclk_rate
In the v11 SDI userguide it describes the new signal refclk_rate with the following: refclk_rate : Input : Set input 0 for a 148.35-MHz RX serial reference clock and input 1 for 148.35-MHz RX...
Altera_ForumHonored Contributor
Honored Contributori filed an SR on this:
Below statement is the corrected one. Set input 0 for a 148.35-MHz RX serial reference clock and input 1 for 148.5-MHz RX serial reference clock.
