Forum Discussion
Altera_Forum
Honored Contributor
8 years agoHello,
I looked up the Register Map of the transmit DMA and it seems that the DMA is not streaming the data from the memory to the Avalon ST. The content of the status register is 0000_1000 which means that the core has completed processing the descriptor chain. The content of the status register is 0111_1000, so interrupts are enabled and the RUN bit is set. The content of the next_descriptor_pointer is not changing and only contains the address of the first descriptor. Furthermore, I attached the settings of the SGDMAs from the Qsys editor. Do you know what is going wrong? Thank you for your help, Jan