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Altera_Forum
Honored Contributor
Honored ContributorRGMII with the triple speed ethernet MAC core
Hello, I have a board with a Stratix II 180 C3 FPGA and a Marvell gigabit Ethernet PHY. The MDIO connection with the Phy works well. I can get the Phy status/id/etc. I also receive Ethernet pac...
Altera_ForumHonored Contributor
Honored Contributor>> Does this work for non-gigabit speeds?
No, my solution was only for GBit-Ethernet, because my application needs that speed. I ignored 100MBit and lower. Because I don't have a datasheet, I do not know anathing about the special registers of the marvel chip. The regular registers of most PHYs are described in the Xilinx document Ug194.pdf , Chapter 5, MDIO Interface. ( The system does not allow me to post the link here)
