Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorRGMII with the triple speed ethernet MAC core
Hello, I have a board with a Stratix II 180 C3 FPGA and a Marvell gigabit Ethernet PHY. The MDIO connection with the Phy works well. I can get the Phy status/id/etc. I also receive Ethernet pac...
Altera_ForumHonored Contributor
Honored ContributorI had the same problems:
Terasic DE2 Evaluation Board with Marvel 88E1111: I use the TSE-Core from Altera, connected over RGMII. I do no special setup of the Marvel Chip, because I also have no datasheet. The hint with the 90deg phase was the solution. I created a PLL for the 125 MHz signal. The 0-degree frequency goes into the TX_clock of the IP-core. The 90-degree freqency goes into the PHY GTX clock. Then sending of a frame succeeds.
