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Altera_Forum
Honored Contributor
Honored ContributorRGMII with the triple speed ethernet MAC core
Hello, I have a board with a Stratix II 180 C3 FPGA and a Marvell gigabit Ethernet PHY. The MDIO connection with the Phy works well. I can get the Phy status/id/etc. I also receive Ethernet pac...
Altera_ForumHonored Contributor
Honored ContributorThe only documentation I know of is the TSE datasheet. The design example then shows you how it can be connected on the Cyclone III development kit.
If you are new to Verilog, it could be a good idea to try some simpler tutorials about the language and FPGAs first, because setting up an Ethernet interface in an FPGA isn't an easy task for a beginner, unfortunately.
