Forum Discussion

dscully's avatar
dscully
Icon for New Contributor rankNew Contributor
3 months ago
Solved

Tone Mapping Operator IP Malfunctioning

Hello, I am currently evaluating the Tone Mapping Operator IP from the Video and Vision Processing Suite for integration into our video camera product. The issue is that when attempting to enable...
  • Wincent_Altera's avatar
    Wincent_Altera
    3 months ago

    Hi @dscully David,

    Does this IP have undocumented restrictions on input resolution?
    >> Yes, there is restrictions on the input resolution.

    For the input width, it needs to be multiple of the pixels in parallels (PIP) and the number of internal tiles (it is fixed as 4)

    • So, if PIP = 4 and Number of tiles = 4, then the width needs to be multiple of 4x4 = 16
    • For the given two widths you could see that condition is not met, 1944/16 = 121.5 and 3268/16=204.25
    • I suggest your to try: 1952 for the first case,
      • and 3280 for the second case, then if need be, you could use a clipper to put the width back to your desired width.
    • For the input height, it needs to be multiple of the number of internal tiles (it is fixed as 4)
      • In this case, your current values are both fine.


    Regards,
    Wincent_Altera

dscully's avatar
dscully
Icon for New Contributor rankNew Contributor
3 months ago

Hi Wincent,

I reviewed the example code you sent me. The setup of the core is here:

 intel_vvp_tmo_instance tmo;
 intel_vvp_tmo_base_t TMO_PIPE_0_TMO_BASE = reinterpret_cast<intel_vvp_tmo_base_t>(VIDEO_PROC_PIPE_0_TMO_BASE);
 intel_vvp_tmo_init_instance(&tmo, TMO_PIPE_0_TMO_BASE);
 intel_vvp_tmo_set_bypass(&tmo, 1);
 intel_vvp_tmo_set_volume(&tmo, 45);
 intel_vvp_tmo_set_threshold(&tmo, 4500);
 intel_vvp_tmo_set_resolution(&tmo, PIPE_DIM.x, PIPE_DIM.y);

I changed my setup to exactly match this order:

intel_vvp_tmo_init_instance(&cam_tmo, (intel_vvp_core_base)VVP_MAIN_PATH_VVP_MAIN_INTEL_TONEMAP_BASE);
intel_vvp_tmo_set_bypass(&cam_tmo, 1);
intel_vvp_tmo_set_volume(&cam_tmo, 45);
intel_vvp_tmo_set_threshold(&cam_tmo, 4500);
intel_vvp_tmo_set_resolution(&cam_tmo, 1920, 1080);

I verified that frames were flowing through the IP by checking the field count registers of the VVP IPs (IMG_INFO_FIELD_COUNT) before the TMO IP and after. The resolution registers (IMG_INFO_WIDTH/IMG_INFO_HEIGHT) for these IPs also match the set resolution.

I then ran a terminal command that calls intel_vvp_tmo_set_bypass(&cam_tmo, 0);

Sometimes the processor will hang on this write. Other times it does not freeze but the other IPs report a non-changing field count.

As you can see, there are issues even if not using ROI.

Best,

David

  • Wincent_Altera's avatar
    Wincent_Altera
    Icon for Regular Contributor rankRegular Contributor
    3 months ago

    Hi David,

    Sometimes the processor will hang on this write. Other times it does not freeze but the other IPs report a non-changing field count.
    >> Can I know how often this happen ?
    >> What is the other IPs report non-charging field count ? Can you please at least give me few of the affected IP and the error message (if have) ? so that I can better visualize what you seeing just now.

    As you can see, there are issues even if not using ROI.
    >> Are you using the same device OPN as the design example ?
    >> can you please use the design without modified anything ? Just to help us to narrow down the problem.
    >> If you still seeing the same error from the design example , then we shall move our direction to the HW settings. Else we will focus on what is the minor different between yours design with our design provided.

    Regards,
    Wincent_Altera