jc_ddc
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New ContributorSSGDMA Bursting Manager Interface BAR
Hello, I am working on a PCIe interface for an Altera Agilex 5 device. The PCIe interface will have two BARs defined for accessing user memory and registers without DMA (ex. memory mapped to BAR 1, ...
Hi @jc_ddc ,
I check internally, unfortunately we do not have any well proven 100% design to reduce the resource utilization for MCDMA.
For effective working mcdma , I would strongly suggest to consider Agilex5 Modular devkit or Premium devkit.
Else you can try to start by minimizing the number of channels and FIFO depths in the MCDMA configurator. If that's insufficient, consider a simpler DMA IP or a custom solution if your resource constraints are very tight.
Regards,Wincent_Altera
