mipi csi2 tx, upper limit of video width

Hi yumada ,

I've had problems getting the sim to run in that config, as the sim wasn't really designed to handle such long lines, it was only intended to demonstrate data flow I believe.  As I can see a simple way to fix the main place it struggles.  However, I don't see the issue that you reporting in that configuration - I can get 7680 pixel lines through CSI Tx in the stated configuration without seeing the input stall.


In RAW8 each pixel has 8 bits, which in the VVP streaming protocol is carried using 16-bits per pixel.  So 4-PIP RAW8 requires a 64-bit wide data bus.  But the cfg_pkg image and waveforms show a 96-bit data bus, which at 4 PIP implies 24-bits per pixel.  Unfortunately, the image of cfg_pkg was cropped to hide the data type.  For example, mine for the above was:

Regards,
Wincent