It seems working as the Rx clk and recover clk are both 0Hz, and lock status = 0, though the MAC status looks weird to me either, would suggest to try some debug and see if the loop_off is correctly set or not first.
the process is in the *\hwtest\altera\alt_aeu_40\eth_ultra_phy_inc.tcl :
proc setphy_lpoff {} {
global BASE_RXPHY
global ADDR_PHY_PMALOOP
# puts "RX PHY Register Access: Setting Serial PMA Loopback\n"
reg_write $BASE_RXPHY $ADDR_PHY_PMALOOP 0x0
reg_read $BASE_RXPHY $ADDR_PHY_PMALOOP
}
May edit the puts here to see if it's set or not first.