XQSHEN
Occasional Contributor
5 years agoQuestion about UniPHY with DDR2
1) avl_size only has 3 bits, how to set burstcount = 8?
2) during ddr2 simulation using intel model, there are two many avl_ready = 0 even I set avl_size = 3'd4;
It significantly impact the data transfer efficiency. How to improve it?
Hello,
avl_size is generated according to the maximum AVMM burst length, the default length is 4, this is why you will find the signal is only 3bits. You can enlarge burst length is you want to improve efficiency of controller.