Forum Discussion
KhaiChein_Y_Intel
Regular Contributor
6 years agoHi,
The LPM_PIPELINE specifies the number of Clock cycles of latency associated with the quotient[] and remainder[] outputs. A value of zero (0) indicates that no latency exists, and that a purely combinational function will be instantiated. If omitted, the default is 0 (non-pipelined). You cannot specify a value for the LPM_PIPELINE parameter that is higher than WIDTH_Q.
and the PIPELINE_DELAY shifts the placement of the pipeline registered stages. By default, WIDTH_Q/2 starts at the middle stage. Specify 0 to start at the last stage. Specify WIDTH_Q-1 to start at the first stage. The default value is WIDTH_Q/2.
Thanks.
Best regards,
KhaiY