Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

Qsys new component: char LCD, 8-bit or 4-bit selection?

Hi all, I'm new to FPGAs and I want to make a new component in qsys. I saw the ip for Optrex 16207 LCD controller core and there also another in "altera\15.0\ip\altera\sopc_builder_ip\altera_av...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

You can display parameters and have the user configure them. Not sure you can do anything graphical (i.e. picture of the LCD).

What do you mean by# defines? Sounds like C code not HDL. Or do you mean the `define statements in Verilog?

Really you should be using parameters in HDL rather than `defines. The parameters can then be displayed in Qsys and the user set the values (these will be embedded into HDL code generated by Qsys).