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Adithiya_R's avatar
Adithiya_R
Icon for New Contributor rankNew Contributor
3 months ago

PTILE + PIO Example design

For the Ptile+PIO example design, with Intel BFM --- in endpoint config, if we replace the PIO instance with CUSTOM_LOGIC, we can perform

  1. BAR0 ( MemWr, MemRd) --- ( BFM, PTILE_EP---> Custom Logic)
  2. Similarly, we can also initiate MemWr, MemRd ( Custom Logic ---> PTILE_EP ---> BFMs Shared Memory)
  3. But in the current BFM, is there a provision to exercise Interrupt ( legacy, MSI/MSI-X)?

3 Replies

  • Wincent_Altera's avatar
    Wincent_Altera
    Icon for Regular Contributor rankRegular Contributor
    3 months ago

    Hi Adithiya,


    I just try to understand what you going to do before we actually go into your question.


    1. BAR0 ( MemWr, MemRd) --- ( BFM, PTILE_EP---> Custom Logic)
    2. Similarly, we can also initiate MemWr, MemRd ( Custom Logic ---> PTILE_EP ---> BFMs Shared Memory)

    >> Okay, if I understand correctly that will be the reason you using custom logic instead of build in Intel BFM right ?


    1. But in the current BFM, is there a provision to exercise Interrupt ( legacy, MSI/MSI-X)?

    >> I not sure how you perform your custom logic , but theoretically you can enable these capabilities in your custom BFM instance

    >> BUT ensure your custom logic generates the correct signals or memory writes as per the PCIe specification.


    Regards,

    Wincent_Altera


    • Wincent_Altera's avatar
      Wincent_Altera
      Icon for Regular Contributor rankRegular Contributor
      3 months ago

      Hi ,

      Given that there is no any response on this case , I assume you had found the solution somewhere else.
      Do let us know back if you need any other help.

      Regards,
      Wincent