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Altera_Forum's avatar
Altera_Forum
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9 years ago

problems creating qsys component, understanding Avalon master& slave reads

Hi, what I am trying to do is building myself a InstructionCache Qsys component to use with the NiosII(e) as it lacks one. Since I found the Nios instructions to be 32 bits long and I thought...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

I have narrowed it further down to :

cacheValids(currentBlock0DescriptorIndex) <= '1'; and the cacheValids(currentBlock1DescriptorIndex) <= '1';

Its starting to occur to me that bulding memory with arrays might not be the best idea, how about I scap the internal memory idea and use several Static RAM IPs instead?

Two static rams, one for the block memory and one in which I combine the tag + used + valid bit into one vector or better one big vector for both blockdescriptors ?