Problema with ip_compiler for PCI express under QSYS

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Under qsys, if I insert a component "ip_compiler for PCI Express" , when generating HDL the following errors appear:

Error (114000): Time value Mbps Mbps and time unit are illegal

Error (114000): Time value 125.0MHz MHz and time unit are illegal

My FPGA is a Cyclone IV GXI am using Quartus II 15.0.1

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Mind share further on the configuration that you are using? I tried with my Quartus II 15.0 and seems like no issue generating the HDL.