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Altera_Forum
Honored Contributor
10 years agoHi Ted,
Thanks Ted for your reply. All the mode configuration registers of CVO read 1 and the underflow bit is also 1. Also I have noticed the CVO input video packet, the control packet data alternates between 0F,00,02,0D,00,01,02,00,0F,00 and 0F,00,02,0D,00,01,02,00,0B,00. According to the above data packets , width = 2D0h= 720 ,height =120F /120B = 4623/ 4619 I do not understand the height part of the packet . Is it correct? Following are my CVO settings image width: 720 image height: 576 Bits per pixel per color plane: 8 Number of color planes: 2 Color plane format: sequence Allow output channels in sequence : checked Interlaced video: checked Syncs signals: Embedded in video Active picture line: 23 Field 1 Ancillary packet insertion line :8 Embedded syncs-Field1 Horizontal blanking :144 Vertical blanking :2 Interlaced and field 0 parameters F rising edge line :313 F falling edge line :1 Vertical blanking rising edge line :311 Ancillary packet insertion line :321 Embedded syncs Field 0 Vertical blanking :24 lines pixel fifo size: 55296 (4 times [(1440+288)*8])i.e 4 lines of data Fifo level : 55295 I have tried various combinations but the output does not appear proper and the underflow bit is always high. Video in and out use same clock: checked Use control port : checked Runtime configurable video modes : 1 modes Width of vid_bus :1 bits Regards, Vidya