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Altera_Forum
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14 years ago

problem with PCIe troughput in CIV GX DevKit

hi friends i have a problem with the PCIe in the cyclone IV FPGA: i have implement the PCIe HIP using Qsys on Quartus II 11.0 with the modular SGDMA and a On-Chip-Memory. i connect the CIV...
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Altera_Forum
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13 years ago

Hi casamar and Dave,

I am currently also having this issue! Have either of you been able to find the answer to this? As for an actual solution, this is the closest I've found so far:

http://www.altera.com/support/kdb/solutions/rd03092011_589.html

Apparently you have to write to the Link Control register located at 0x90, but how?

Cheers,

Josef