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Altera_Forum
Honored Contributor
16 years agoHello,
"OutputNumber" is a Std_logic_Vector(5 downto 0). It is a vector that store the number of output (eg.: "000000" means no outputs; "01010" means 10 outputs and so on....) The integer variable "Int" store the equivalent integer value: No outputs: Int:=0; 10 outputs: Int:=10 and so on..... "Temp" is a 38bit vector, but i need to copy only a range to "MyVector" Int <= conv_integer(OutputNumber); MyVector(37 downto (38-Int)) <= Temp(37 downto (38-Int)); Quartus Compiler Error: Error (10454): VHDL syntax error: right bound of range must be a constant