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Altera_Forum's avatar
Altera_Forum
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16 years ago

Problem with feedback connection

Hi everyone, I have make a simply firmware in dsp builder but have some problem in feedback connection. If i run a simulation in simulink I haven't any kind of problem, these arise after the downl...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Hi everyone, maybe I'm not clear about the trouble founded in the test model create by me via DSP BUILDER.

I have two questions:

1) If the firmware work @300MHz the latency of block divider is less than the clock period??

2) There are some possible truble about a feedback connection in the subtractor node???

I make this two answer because i haven't considerate the divider latency in test project and i think that there is no problem in feedback connection but when i "program" FPGA i found out of the subtractoru 1 e -1 instead of 0.

Again thanks for attention and sorry for my english.

Bye Bye at all