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Altera_Forum
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15 years ago

Problem running pin_assignments.tcl script with uniPHY DDR3 controller

Hi, I'm experiencing some problems with SoPC builder and quartus 11.0. Why SoPC builder and not Qsys ? Because I use an IP that is'nt yet avaible with Qsys... I did a very simple p...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Here is an example of a Python script which can do all the job for you, just replace the path and the name of your top level entity generated sy SoPC builder : 


f = open('./src/sopc/your_sopc_top_level.vhd')
text = f.read()
f.close()
new_text = text.replace("mem_cas_n : OUT STD_LOGIC_VECTOR (0 DOWNTO 0);", "mem_cas_n : OUT STD_LOGIC;")
new_text = new_text.replace("mem_ck : OUT STD_LOGIC_VECTOR (0 DOWNTO 0);", "mem_ck : OUT STD_LOGIC;")
new_text = new_text.replace("mem_ck_n : OUT STD_LOGIC_VECTOR (0 DOWNTO 0);", "mem_ck_n : OUT STD_LOGIC;")
new_text = new_text.replace("mem_cke : OUT STD_LOGIC_VECTOR (0 DOWNTO 0);", "mem_cke : OUT STD_LOGIC;")
new_text = new_text.replace("mem_cs_n : OUT STD_LOGIC_VECTOR (0 DOWNTO 0);", "mem_cs_n : OUT STD_LOGIC;")
new_text = new_text.replace("mem_odt : OUT STD_LOGIC_VECTOR (0 DOWNTO 0);", "mem_odt : OUT STD_LOGIC;")
new_text = new_text.replace("mem_ras_n : OUT STD_LOGIC_VECTOR (0 DOWNTO 0);", "mem_ras_n : OUT STD_LOGIC;")
new_text = new_text.replace("mem_we_n : OUT STD_LOGIC_VECTOR (0 DOWNTO 0)", "mem_we_n : OUT STD_LOGIC")
new_text = new_text.replace("mem_cas_n(0)", "mem_cas_n")
new_text = new_text.replace("mem_ck(0)", "mem_ck")
new_text = new_text.replace("mem_ck_n(0)", "mem_ck_n")
new_text = new_text.replace("mem_cke(0)", "mem_cke")
new_text = new_text.replace("mem_cs_n(0)", "mem_cs_n")
new_text = new_text.replace("mem_odt(0)", "mem_odt")
new_text = new_text.replace("mem_ras_n(0)", "mem_ras_n")
new_text = new_text.replace("mem_we_n(0)", "mem_we_n")
f = open('./src/sopc/your_sopc_top_level.vhd', 'w')
f.write(new_text)
f.close()