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Altera_Forum
Honored Contributor
Honored Contributorproblem of LCD controller
hi, i would convert a verilog code to vhdl code , //code verilog always@(posedge iCLK or negedge iRST_N) begin if(!iRST_N) begin LUT_INDEX <= 0; ...
Altera_ForumHonored Contributor
Honored Contributorthank's for your reply
the code compile correctly but there is no result in the LCD. because i would to creat a controller of LCD 16x2 in DE2 i don't know what the origine of problem ? may be this part of initilization of LCD. but i would to ask you i can't add the falling_edge(iRST_N)? because the verilog code he use always@(posedge iCLK or negedge iRST_N) begin if(!iRST_N) begin
