Forum Discussion
Altera_Forum
Honored Contributor
16 years agoYes I did. But unfortunatelly testbench (vec file) does not contain sop end eop signals. It seems like testbench is generated for the old style FIR interface (prior to Avalon style signals). I even reinstalled Quartus SP2, but testbench still does not describe sink_sop and sink_eop signals.