prevent write/write collision in on-chip True Dual Port Ram

Hi HBS:

The most efficient solution is to limit memory ranges, so NIOS A can write, only X range but read Y range, and NIOS B can only Write Y range but Read X range.

Now you eliminate the issue where both write to the same address (unless you have a coding memory leak)

If you are going to allow both processors to write to all the memory, then I suggest you make one the Memory Manager, where the second processor must request, then receive approval for that memory access from the "Master" processor.

This avoids timing conflicts, where Processor A and B both want to write, they check, and the other processor is not writing, so they both set their write bit and start writing at the same time..

Pete