Forum Discussion
Altera_Forum
Honored Contributor
17 years agoPre-Emphasis with IIR Filter
Hello! I want to do a classic Pre-Emphasis with VHDL. Normally this is implemented with an IIR-Filter. I tried to do this in VHDL with the following formula I found in the web: y(i)=x(i)-(x(i-1...
Altera_Forum
Honored Contributor
17 years agohere is my first go:
elsif (clk'event AND clk = '1') then
X <= Input;
Yn_tmp := Xi1 * b0_var;
Yn_tmp2 := Yn_tmp / div;
Yn := resize(Xi, Yn_tmp2'length) - Yn_tmp2;
Output <= resize(Yn, Output'length);
Xi1 := resize(Yn, Xi1'length);
Xi := X;
end if;
note that Yn relates to Xi and Yn_tmp2 yet Yn_tmp2 relates to Xi1 Xi and Xi1 are same stage values.(only x is delayed at x <= input))