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Oliver,
I recently shipped a PCIe design using Altera's Cyclone IV GX hard IP core. See the link below for the ref des that I used. Altera has several ref des for PCIe but I chose this one because I think it's rather intuitive and easier to add your custom logic to it. The DMA is not scatter-gather (it requires contiguous space) but this can serve as a baseline for your PCIe DMA design. Hope this help.
http://sites.google.com/site/ednalabs/project/fpga/tips/pcie-design-with-altera --- Quote End ---
That site links to this reference design (AN575)
http://www.altera.com/support/refdesigns/sys-sol/indust_mil/ref-pciexpress-ddr2-sdram.html However there are no download links to get the source on that page, other than the user guide. Where do you get the actual reference design?
I found this one as well (AN431):
http://www.altera.com/support/refdesigns/ip/interface/ref-pciexpress-ddr3-sdram.html Is that just an updated version of AN575? I can't even get it to compile properly.
In any case, I'm trying to find a reference design in VHDL rather than verilog if possible. It's starting to become pretty frustrating to find a starting point for my PCIe project. I'm just trying to dump data from custom logic over PCIe to a solid state drive - no NIOS/Qsys/OS apps involved.
-Ian
Honored Contributor
