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Seems that all depends on other factor.
1)Error: Can't place PLL "test_pll:inst9|altpll:altpll_component|test_pll_altpll:auto_generated|pll1" in target device due to device constraints
It should be if you've try to set the PLL in a location that is not compatible, or if your CLOCK INPUT PIN is phisically attached not to the PLL you've set to use.
Good luck
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Hi Darkwave,
From Pin Planner, I know which pins are connected to PLL, for example, PIN_AA) PLL_CLKOUT1n, as I am trying to set DDR2, I didn't place PLL manually. So, based on what you said, cause# 1 is out of question since it is automatically placed, therefore, cause# 2, my ref_clk wich is constrained by my .sdc to be 100MHz.
How do I know where my PLL is? and how to connect them?
Honored Contributor
