Forum Discussion
Altera_Forum
Honored Contributor
14 years agothanks,
what do they mean by internal logic as an input the the ppls? is this logic connects the pll outputs to the inclk in another pll only? what is the reason that i can't connect a clock from an internal logic to a pll? and in case i need to create the clock myself ,i couldn't find in the cyclon 3 datasheet jitter specification for an internal clock in the design. this clock used by hardware and not by memory or other plls. thanks