Forum Discussion
Altera_Forum
Honored Contributor
Honored Contributorpipeline bridge bursting and clock crossing bridge fifo length
Hello, I'm new to Qsys/SOPC Builder and I'm currently developing a Nios II system and have problems to understand what the effects and the dependencies of the mentioned features are. The C...
Altera_ForumHonored Contributor
Honored ContributorOn-chip memory doesn't support bursting (don't make sense to burst into on-chip RAM). I assume you are talking about the old SDR SDRAM controller listed in SOPC Builder/Qsys? If so it doesn't support bursting either.
