PIO Interrupts PCIe

Hi ringo,

a lot of questions from your side. I will try to give you some answers. First of all you can take a look in the documentation of the PIO Core which is part of the "Embedded peripherals user guide". I extracted the PIO Core so you don´t have to work through the whole documentation. On Page 9-6 you will find the registermap of the PIO Core and which of them are R/W.

With "Enable bit-clearing for edge capture register" your handling of the interrupt is clear. If you generate an Interrupt i.e. on Input two, you have to clear the edge capture bit by writing 0x02 to the edgecapture register.

I hope this helps you out a little bit!

JacoL