Honored Contributor
Honored ContributorHi,
I git quite the same problem: -Error: Can't place VREF pin AC18 (VREFGROUP_B4_N1) for pin dq[0] of type bi-directional with 1.8-V HSTL Class I I/O standard at location AG22 - Error: Too many output and bidirectional pins per VCCIO and ground pair in I/O bank 4 when the VREF pin AC18 (VREFGROUP_B4_N1) is used on device EP3C120F780C7 -- no more than 9 output/bidirectional pins within 12 consecutive pads are allowed when the voltage reference pins are driving in, but there are potentially 10 pins driving out Info: Location AG19 (pad PAD_219): Pin LED[6] of type output uses 1.8-V HSTL Class I I/O standard Info: Location AH19 (pad PAD_220): Pin dm[0] of type output uses 1.8-V HSTL Class I I/O standard Info: Location AC17 (pad PAD_221): Pin LED[5] of type output uses 1.8-V HSTL Class I I/O standard Info: Location AF18 (pad PAD_226): Pin LED[2] of type output uses 1.8-V HSTL Class I I/O standard Info: Following 1 pins have the same output enable group -26: 1 pins require VREF pin and 1 pins could be output Info: Location AG18 (pad PAD_217): Pin dq[8] of type bi-directional uses 1.8-V HSTL Class I I/O standard Info: Following 1 pins have the same output enable group -24: 1 pins require VREF pin and 1 pins could be output Info: Location AH18 (pad PAD_218): Pin dq[10] of type bi-directional uses 1.8-V HSTL Class I I/O standard Info: Following 1 pins have the same output enable group -30: 1 pins require VREF pin and 1 pins could be output Info: Location AD17 (pad PAD_222): Pin dq[4] of type bi-directional uses 1.8-V HSTL Class I I/O standard Info: Following 1 pins have the same output enable group -31: 1 pins require VREF pin and 1 pins could be output Info: Location AG21 (pad PAD_223): Pin dq[3] of type bi-directional uses 1.8-V HSTL Class I I/O standard Info: Following 1 pins have the same output enable group -33: 1 pins require VREF pin and 1 pins could be output Info: Location AH21 (pad PAD_224): Pin dq[1] of type bi-directional uses 1.8-V HSTL Class I I/O standard Info: Following 1 pins have the same output enable group -32: 1 pins require VREF pin and 1 pins could be output Info: Location AH22 (pad PAD_228): Pin dq[2] of type bi-directional uses 1.8-V HSTL Class I I/O standard Info: Following 12 location(s) shared the same VCCIO and ground pair, and 10 pin(s) are placed Info: Location AG18 (pad PAD_217): Pin dq[8] of type bi-directional uses 1.8-V HSTL Class I I/O standard Info: Location AH18 (pad PAD_218): Pin dq[10] of type bi-directional uses 1.8-V HSTL Class I I/O standard Info: Location AG19 (pad PAD_219): Pin LED[6] of type output uses 1.8-V HSTL Class I I/O standard Info: Location AH19 (pad PAD_220): Pin dm[0] of type output uses 1.8-V HSTL Class I I/O standard Info: Location AC17 (pad PAD_221): Pin LED[5] of type output uses 1.8-V HSTL Class I I/O standard Info: Location AD17 (pad PAD_222): Pin dq[4] of type bi-directional uses 1.8-V HSTL Class I I/O standard Info: Location AG21 (pad PAD_223): Pin dq[3] of type bi-directional uses 1.8-V HSTL Class I I/O standard Info: Location AH21 (pad PAD_224): Pin dq[1] of type bi-directional uses 1.8-V HSTL Class I I/O standard Info: Location AE18 (pad PAD_225): unused (but has pin assignment of dqs[0]) Info: Location AF18 (pad PAD_226): Pin LED[2] of type output uses 1.8-V HSTL Class I I/O standard Info: Location AG22 (pad PAD_227): unused (but has pin assignment of dq[0]) Info: Location AH22 (pad PAD_228): Pin dq[2] of type bi-directional uses 1.8-V HSTL Class I I/O standard I just try to build a group to put all the error assignments in but it doesn´t work. Have somebody an idea how i can handle it? Thanks for your reply!
