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Altera_Forum
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15 years ago

PHY Transmission - Arria II GX

I am attempting to send a packet over the PHY (Marvell 88E1111) on my Arria II GX board. I followed instructions on how to generate the correct signals. This is done through a large state machine in ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

What exactly didn't work in the ddr i/o megafunction? Maybe we should start by looking at that.

Did you put timing constrains on the RGMII interface? Does the design meet all timing requirements? he PHY chip can be configured with a 90 degrees clock shift to read/write data at the clock center instead of the edges, by using a special MDIO register.