Forum Discussion
PFL - Flash queries
Hi Kevin,
Sorry for being late as we were out of office. Hope you are doing good.
Please find my response below:
[1] https://www.intel.com/content/www/us/en/programmable/support/support-resources/knowledge-base/soluti...
So if I use the 'Convert Programming Files' , select
Configuration device: CFI_1Gb
Mode: Passive Parallel x16
& then convert .sof to .rbf file to generate the .rbf file
1) Can I then assume that the .rbf contains purely just configuration data (no headers bytes involved) ?
Yes, this is pure configuration data with no header.
2) The configuration data in the .rbf programming file is little Endian as stated in this link.
For FPPx16 mode, the first byte in the file is the LSB (Least Significant Byte) of the configuration word and the 2nd byte is the MSB (Most Significant Byte)
If .rbf contains sequence 02 1B EE 01
then for FPPx16 mode:
Word 0 = 1B 02 Word 1 = 01 EE
LSB: BYTE0 = 02 , MSB: BYTE1 = 1B LSB: BYTE2 = EE, MSB: BYTE3 = 01
D[7:0] D[15:8] D[7:0] D[15:8]
00000010 00011011 11101110 00000001
I can then try to place Word 0 data to Start address 0, Word data 1 to address 1 etc ?
(If my start address for a Page is defined as 0x00000000)
First of all, if you are using RBF file, you need to write your own controller to do programming and configuration as PFL IP is not supporting RBF file.
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_pfl.pdf (Page
So to answer your question, addressing and data are different. You can have 16 bit data on an address if you are using x16. Thus, you can put 0000 0010 0001 1011 (2 bytes) to 0x0000 0000.
Thank You.
Regards,
Bruce
- Knug5 years ago
Contributor
Hi @YuanLi_S_Intel ,
Thanks for your replies so far. Please comment here too (urgent to know please).
>> First of all, if you are using RBF file, you need to write your own controller to do programming and configuration as PFL IP is not supporting RBF file.
What file formats does the PFL IP support other than .pof that we can identify its contents ?
or how can we decode the contents of a .pof file?
Does it just contain the OPTION_bits data followed by the Page data info and no other headers involved?
If it does great. But need confirmation.
eg Page 1
.map file generated for the corresponding .pof file for Page1 was :
--------------------------------------------------------
BLOCK START ADDRESS END ADDRESS
Page_1 0x00440000 0x0085241B
OPTION BITS 0x00000000 0x00000080Notes:
- Data checksum for this conversion is 0xB8A3B1AF
- All the addresses in this file are byte addresses
----------------------------------------------------------------
Regards,
Kevin
- Knug5 years ago
Contributor
Will appreciate a reply to my previous msg.
Our latest updates :
Chunks of bytes will be send via I2C to the CPLD via FPGA (FPGA is just a middle man, pass through i2c data to CPLD).
So configuration data will be coming from FPGA to CPLD now. Data manipulation will be done in the CPLD. CPLD contains one PFL (see next paragraph) & will update the flash Device. I will need to supply data to the combined loader_config_pfl with some manipulation of course. Could this data be .pof format (knowing its structure?). Then the writing data to the flash will be held automatically by the combined loader_config_pfl itself (which I am trying to test right now, not remotely to get that to work first)
Wrt another ticket I created, we are trying to combine now 'flash programming' + 'FPGA configuration' using one PFL. Having other issues here at the moment not knowing how to control the handshaking signals pfl_flash_access_granted & pfl_flash_access_request to achieve successful flash programming & FPGA configuration. Your reply to this matter will be appreciated too. In this instance we are not sending any data across via I2C.
With this test I am doing now (having issues with the 2 handshaking signals how to properly control), we are:
1) Programming/configuring the CPLD with the combined loader_config.pof
2) Then after power cycle, autodetecting the flash device
3) Then we program/Configure the flash with the application page data .pof
=> We expect to see successful Flash programming & FPGA configuration at the end of this test
------
Could we have byte of data that can be converted to JTAG kind of data for the loader_config_pfl to understand? or can you propose other ways to achieve this?
ie need to be able to extract the data (eg .pof) & supply it to the loader (this will be implemented in VHDL).
What is the best way of achieving this ?
It is very important to know what the .pof structure format looks like otherwise will not now what data will be sending across to the loader and how the loader will receive it and understand it?
Regards,
Kevin
- Knug5 years ago
Contributor
>> First of all, if you are using RBF file, you need to write your own controller to do programming and configuration as PFL IP is not supporting RBF file.
Q/ Is this still the case ?
Found the following comments by @ShafiqY_Intel who replied to another user the following :
Yes, PFL is able to configure the FPGA with .rbf file if only you convert POF to rbf. (not SOF to rbf). You no need to write extra Option Bits to the flash device (in rbf file already include Option Bits (in binary form) )
1) converting .pof to .hexout
quartus_cpf -c <pof_file_base_name>.pof <hex_file_base_name>.hexout
2) Then convert .hexout to .rbf using nios2_elf_objcopy command on the NIOS II command shell
nios2-elf-objcopy –I ihex –O binary <input file>.hexout <output file>.rbf
--
1) I found the way to convert from .pof to .hexout on the quartus command window because above quartus_cpf command was not recognised :
Invoke Quartus. Load the project
cd into the directory where the .pof file is
Then execute the following in the command window :
execute_module -tool cpf -args "-c *.pof *.hexout"I am not using the NIOS II processor just a CPLD with the PFL instantiated within it and an FPGA Cyclone V (no NIOS II processor is used within the FPGA)
Where can I execute the 2nd nios2_elf_objcopy command:
nios2-elf-objcopy –I ihex –O binary <input file>.hexout <output file>.rbf
Do I need a special NIOS II command shell? If yes, how do I get this ?
=> Looks like I need to get the NIOS II command shell up to be able to type above NIOS II command.
I have the following directory:
C:\intelFPGA_lite\20.1.0\nios2eds
Inside it contains:
- NIOS II Command Shell.bat
- nios2_command_shell.sh (Is this the Unix version?)
- version.ptf
Need the windows command shell version.
Clicked on the "NIOS II Command Shell.bat" executable but window opens and closes instantly. I also tried to give administrator right permission but see same behaviour (ie Command Shell prompt window instantly closes after it is opened)
Need assistance here please..
I asked @ShafiqY_Intel the same question.
Regards,
Kevin
- Knug5 years ago
Contributor
Did you see my latest message wrt not able to convert directly from .sof to .rbf because the
"PFL is able to configure the FPGA with .rbf file if only you convert POF to rbf (not SOF to rbf). These were comments by ShafiqY_Intel
to another user asking a similar question in another ticket. He suggested doing it the following way :
1) converting .pof to .hexout
quartus_cpf -c <pof_file_base_name>.pof <hex_file_base_name>.hexout [ I managed to do this ]
2) Then convert .hexout to .rbf using nios2_elf_objcopy command on the NIOS II command shell
nios2-elf-objcopy –I ihex –O binary <input file>.hexout <output file>.rbf
That is the reason why I asked the question about the NIOS II command (2) ie .hexout to .rbf how to get it up and running (how to get the NIOS prompt ..).
No answer to this yet.
----
& one of your other replies before I replied with above was :
>> First of all, if you are using RBF file, you need to write your own controller to do programming and configuration as PFL IP is not supporting RBF file.
From above PFL supports RBF but needs to be converted from 1) .pof to .hexout , then 2) .hexout to .rbf
Isn't this the case ?
Regards,
Kevin