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Altera_Forum's avatar
Altera_Forum
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15 years ago

PCIe(soft core) + SOPC + 16 bit CFI flash - not good..

I'm essentially memory mapping the Nor flash to the system PCIe bus, so that the host CPU can read and write the Nor flash via PCIe memory cycles. I used the SOPC builder to create the system ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Actually - Altera support came thru for me. Apparently, even though SOPC builder didn't complain or warn me, I needed to add an "Avalon MM Pipeline Bridge" in between the PCIe core and the Flash/Tristate core.

That fixed the problem..