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Altera_Forum
Honored Contributor
Honored ContributorPCIe(soft core) + SOPC + 16 bit CFI flash - not good..
I'm essentially memory mapping the Nor flash to the system PCIe bus, so that the host CPU can read and write the Nor flash via PCIe memory cycles. I used the SOPC builder to create the system ...
Altera_ForumHonored Contributor
Honored ContributorUse this (http://alterawiki.com/wiki/modular_pcie_sopc_builder_bridge_example) instead.
The default PCIe<=>SoPC Builder bridge has some limitations...that likely won't be addressed in the near future. Cheers, slacker
