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Honored Contributor
Honored ContributorPCIe x4 Root port implementing: Cyclone V vs. Cyclone IV
I want to implement a PCI express root port using a FPGA. My question is simple, It would be enough with an IP_Compiler for PCI Express or it would be necessary a Avalon-MM Cyclone V Hard IP for PCI ...
Altera_ForumHonored Contributor
Honored ContributorAs long as the FPGA has the PCIE Hard IP core, the core can be configured to either rootport or endpoint regardless of the FPGA families.
